As technology evolves, more and more applications demand integrated circuits with higher performance and smaller size. For example, many circuits utilize higher signaling speeds requiring integrated circuits with improved signal integrity for operation at such signaling speeds. Additionally, many applications now require increased durability and reliability. Further, applications often incorporate large numbers of integrated circuits, thereby demanding high packaging density to enable placement of a larger number of integrated circuits in a given circuit board area. Moreover, manufacturers and customers alike expect these requirements to be met with increased cost-savings.
Given these more demanding requirements, conventional integrated circuit packaging techniques are proving inadequate for an increasing number of modern applications. In particular, conventional wire-bonded and flip-chip configurations fail to provide adequate signal integrity, durability, reliability, package density and cost-savings.
As shown in FIGS. 1A and 1B, conventional wire-bonded semiconductor device package 100 comprises semiconductor device 110 with conductive pads 120. Wires 130 connect the conductive pads of device 100 to leadfingers 140, thereby providing electrical continuity between conductive pads 120 and leadfingers 140. Additionally, device 110, conductive pads 120, wires 130 and leadfingers 140 are encapsulated in packaging material 150.
Although wire-bonded semiconductor device packages (e.g., 100) were widely used for some time, their use in modern applications is more limited. Wire bonding provides poor signal integrity given long signal paths providing higher inductance, increased crosstalk, and more limited slew rates. Reflections produced by impedance mismatches of the wire bonding further reduce signal integrity. Additionally, wire-bonded semiconductor device packages (e.g., 100) have low packaging density due to the length of the wires (e.g., 130) connecting the conductive pads (e.g., 120) of the semiconductor device (e.g., 110) to the leadfingers (e.g., 140). Further, the durability and reliability associated with wire bonding is insufficient for modern applications. As such, in an attempt to improve on these limitations, flip-chip configurations were designed and implemented.
As shown in FIGS. 2A and 2B, conventional flip-chip semiconductor device package 200 comprises semiconductor device 210 with conductive pads 220 in a wire-bonded pad arrangement. Leadfingers 240 are bonded to conductive pads 220, thereby providing electrical continuity between conductive pads 220 and leadfingers 240. Additionally, device 210, conductive pads 220, and leadfingers 240 are encapsulated in packaging material 250.
Given that device 110 is positioned in a face-up orientation and device 210 is positioned in a face-down orientation, the pin assignments of each package are mirrored. For example, first pad 160 as shown in FIG. 1A is matched to first pin 170, whereas first pad 260 as shown in FIG. 2A is matched to pin 280 instead of first pin 270. As such, flip-chip configurations must either use devices with flip-chip pad arrangements (e.g., mirrored with respect to wire-bonded pad arrangements) or reroute signal paths to correctly connect pads of a device (e.g., 210) with a wire-bonded pad arrangement to leadfingers associated with appropriate pins. Creation of a device with a flip-chip pad arrangement adds significant cost given the design and manufacture of a new device. Rerouting signal paths of a reoriented device with a wire-bonded pad arrangement also adds cost, while introducing the same signal integrity, reliability and durability problems present in traditional wire-bonded device packages (e.g., 100). Further, rerouting signal paths often leads to longer and unequal-length signal paths, thereby exacerbating the signal integrity problems.